Leakage energy will be the major energy consumer in futuredeep sub-micron designs. Especially the memory sub-systemof future SOCs will be negatively affected by this trend. Inorder to reduce the leakage energy, memory banks are transitionedto a low-energy state when possible. This transitionitself costs some energy which is termed as the transition energy.In this paper we present, as the first approach of its kind,a novel energy saving replacement policy called LRU-SEQ forinstruction caches. Evaluation of the policy on various architecturesin a system-level environment has shown that upto23% energy savings can be obtained. Considering the negligiblehardware impact, LRU-SEQ offers a viable choice foran energy saving policy.
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